- useful for memory-mapped I/O and shared memory.
volatile guaranties that the compiler will generate ordered volatile read and write, but CPU may reorder the execution.
memory barriar is used to avoid the CPUs employ performance optimizations that can result in out-of-order execution.
Compiler memory barrier - prevent a compiler from reordering instructions, they do not prevent reordering by CPU. ex:- asm volatile ("" : : : "memory");
why spinlock required???
1. protects data from multiple thread of execution
==> spin + ena/dis preemption
2. protects data from interruct handler
==> ena/dis interrupt + spin + ena/dis preemption
SMP + PREEMPT ==> spin + disable preemption
SMP + NO PREEMPT ==> spin
NO SMP + PREEMPT ==> disable kernel preemption
NO SMP + NO PREEMPT ==> NULL
==> spinlock protects critical region
==> spinlock provides mutual exclusion
==> spinlock marks the non-preemptible regions
; Intel syntax
lock:
dd 0 ;
spin_lock:
mov eax, 1 ;
xchg eax, [lock] ;
test eax, eax ;
jnz spin_lock ;
ret ;
spin_unlock:
mov eax, 0 ;
xchg eax, [lock] ;
ret ;
Reference:
http://en.wikipedia.org/wiki/Spinlock#Example_implementation
http://en.wikipedia.org/wiki/Memory_barrier
http://en.wikipedia.org/wiki/Memory_ordering
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